how can we draw logic circuits with 128 inputs without showing all the input that means we can draw a logic diagram with showing of 3 or 4 bits as input but how can we draw it 128 inputs with labeling of 1 or 2 inputs and other will be so on till 127 (without labeling) and 128th bit should be labeled .

  • 5
    Welcome to TeX.SE! Please add a sketch of what you want, and most importantly, a minimal working example showing what you have tried.
    – user156344
    Mar 18, 2019 at 6:32

2 Answers 2


First of all welcome to TeX.SE, from next time please show us what you have tried so far. We generally don't prefer do-it-for-me class of questions.

To begin your answer with, you can easily achieve this with circuits and positioning within tikzlibrary.

\usetikzlibrary{circuits.logic.US,circuits.logic.IEC, positioning}
\begin{tikzpicture}[minimum height=0.75cm] 
\node[and gate US, draw,logic gate inputs=nnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnn] (A) {}; 
\foreach \a in {1,...,128}
\draw (A.input \a) -- ([xshift=-2cm]A.input \a); 
\draw (A.output) -- ([xshift=2cm]A.output);
% naming the nodes
\node [left = 2.1cm of A.input 1] (n1) {1};
\node [left = 2.1cm of A.input 2] (n2) {2};
\node [left = 2.1cm of A.input 126] (n3) {126};


to get:

enter image description here

However, with ciruittikz, it is worth looking at:

Is it possible to implement multiple input logic ports with circuitikz?

How to invert Logic Gate input in Circuitikz


I think that, under the point of view of readability, a 128-port anything is too much. If you use the new (unreleased) version of circuitikz (you can find a snapshot in the github page) you are limited to a (still unreadable in my opinion) 16 pins.

I would do something like the following, and textually mark the wires that go to the big or with some kind of symbol... like this

\usepackage[siunitx, RPvoltages]{circuitikzgit}
    \ctikzset{logic ports origin=center}
    \draw(0,0) node[dipchip, num pins=14, no topmark, 
    external pins width=0, hide numbers](A){};
    \foreach \i/\l in {1/1, 2/2, 7/128} 
    \draw (A.bpin \i) node[right, font=\tiny]{\l} -- ++(-0.5,0) coordinate(my pin \i);
    \path (A.bpin 4) node[left]{$\vdots$};
    \draw (A.bpin 11) node[above right, font=\tiny]{out} -- ++(0.5,0);
    \path (A.center) node [american and port]{IC1};
    \draw (my pin 1) -- ++(-0.5,0) node[american xnor port, anchor=out]{}; 
    \draw (-4,-1) node[american xnor port](B){};
    \draw [->] (B.out) -- ++(0.5,0) node[right, align=left]{to IC1\\ pin 36};


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